/**
 * Copyright (C) 2021 - 2031 O-Cubes Co., Ltd.
 */

/****************************************************************
 *  @file    efuse.h
 *  @brief   efuse header file
 *  @version v1.0
 *  @date    03. Apr. 2023
 ****************************************************************/

#ifndef __EFUSE_H__
#define __EFUSE_H__

#include <stdint.h>
#include "io.h"
#include "bits.h"
#include "mem_map_table.h"

#ifdef __cplusplus
extern "C" {
#endif

typedef struct efuse_ctrl efuse_ctrl_t, *efuse_ctrl_t_ptr;

#define EFUSE_BASE_ADDR                 (MEM_MAP_SEC_CFG_BASE_ADDR + 0x28)
#define EFUSE_REG_PTR()                 ((efuse_ctrl_t_ptr)EFUSE_BASE_ADDR)
#define EFUSE_BIT_SIZE                  256

#define EFUSE_PGM_DONE                  BIT(17)
#define EFUSE_RD_DONE                   BIT(18)

#define EFUSE_WR_EN                     BIT(0)
#define EFUSE_PGM_EN                    BIT(1)
#define EFUSE_RD_EN                     BIT(2)

#define EFUSE_CTRL_INFO_OFFSET          20
#define EFUSE_KEY1_INFO_OFFSET          24
#define EFUSE_KEY2_INFO_OFFSET          28

#define EFUSE_BOOT_PART_BIT             28
#define EFUSE_SEC_BOOT_BIT              29
#define EFUSE_LOG_DISP_BIT              30
#define EFUSE_DBG_DISP_BIT              31

/* 256bits efuse */
struct efuse_ctrl {
	__IOM reg_t input;      /* 0x28 */
	__IOM reg_t ctrl;       /* 0x2c */
	__IOM reg_t offset;     /* 0x30 */
	__IM  reg_t data[8];    /* 0x34 ~ 0x50 */
	__IOM reg_t rsvd;       /* 0x54 */
	__OM  reg_t icr;        /* 0x58 */
	__OM  reg_t isr;        /* 0x5c */
	__IM  reg_t mis;        /* 0x60 */
};

int32_t efuse_write(uint32_t addr, uint8_t *data, uint32_t len);
int32_t efuse_read(uint32_t addr, uint8_t *data, uint32_t len);

#ifdef __cplusplus
}
#endif

#endif /* __EFUSE_H__ */

